A structured treatment of the key principles and techniques for enabling efficient processing of deep neural networks, with techniques that don't sacrifice accuracy or increase hardware costs. DNNs are currently widely used for many artificial intelligence (AI) applications, including computer vision, speech recognition, and robotics. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Therefore, techniques that enable efficient processing of deep neural networks to improve key metrics-such as energy-efficiency, throughput, and latency-without sacrificing accuracy or increasing hardware costs are critical to enabling the wide deployment of DNNs in AI systems. The book includes background on DNN processing; a description and taxonomy of hardware architectural approaches for designing DNN accelerators; key metrics for evaluating and comparing different designs; features of DNN processing that are amenable to hardware/algorithm co-design to improve energy efficiency and throughput; and opportunities for applying new technologies. Readers will find a structured introduction to the field as well as formalization and organization of key concepts from contemporary work that provide insights that may spark new ideas.
About the Author
Massachusetts Institute of Technology Massachusetts Institute of Technology Massachusetts Institute of Technology Massachusetts Institute of Technology and Nvidia Research
- Contributor: Vivienne Sze
- Imprint: Morgan & Claypool Publishers
- ISBN13: 9781681738338
- Number of Pages: 341
- Packaged Dimensions: 191x235mm
- Format: Hardback
- Publisher: Morgan & Claypool Publishers
- Release Date: 2020-10-30
- Series: Synthesis Lectures on Computer Architecture
- Binding: Hardback
- Biography: Massachusetts Institute of Technology Massachusetts Institute of Technology Massachusetts Institute of Technology Massachusetts Institute of Technology and Nvidia Research
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