High-level Synthesis: From Algorithm to Digital Circuit

High-level Synthesis: From Algorithm to Digital Circuit

By: Philippe Coussy (editor), Adam Morawiec (editor)Paperback

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High-level synthesis - also called behavioral and architectural-level synthesis - is a key design technology to realize systems on chip/package of various kinds, whether single or multi-processors, homogeneousor heterogeneous,for the emb- ded systems market or not. Actually, as technology progresses and systems become increasingly complex, the use of high-level abstractions and synthesis methods becomes more and more a necessity. Indeed, the productivityof designers increases with the abstraction level, as demonstrated by practices in both the software and hardware domains. The use of high-level models allows designers with systems, rather than circuit, backgroundto be productive,thus matching the trend of industry whichisdeliveringanincreasinglylargernumberofintegratedsystemsascompared to integrated circuits. The potentials of high-level synthesis relate to leaving implementation details to the design algorithms and tools, including the ability to determine the precise timing of operations, data transfers, and storage. High-level optimization, coupled with high-levelsynthesis, canprovidedesignerswith the optimalconcurrencystr- ture for a data ow and corresponding technological constraints, thus providing the balancing act in the trade-offbetween latency and resource usage. For complex s- tems, the design space exploration,i.e., the systematic search for the Pareto-optimal points, can only be done by automated high-level synthesis and optimization tools. Nevertheless, high-level synthesis has been showing a long gestation period. Despite early resultsin the 1980s,it is still not commonpracticein hardwaredesign.

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Preface: Giovanni di Michelli Chapter 1: User Needs. P. Urard, J. Yi, A.Gouraud Chapter 2: HLS: A Retrospective. Rajesh Gupta, Forrest Brewer Chapter 3: Catapult(R) Synthesis. Thomas Bollaert Chapter 4: Algorithmic Synthesis using PICO. S. Aditya, V. Kathail Chapter 5: High-Level SystemC Synthesis with Forte's Cynthesizer. Mike Meredith Chapter 6: AutoPilotTM: A Platform-Based ESL Synthesis System. Jason Cong, et al. Chapter 7: 'All-in-C' SoC Synthesis and Verification with CyberWorkBench. Kazutoshi Wakabayashi, Benjamin Schafer Chapter 8: Bluespec: A General-Purpose Approach to High Level Synthesis based on Atomic Transactions. Rishiyur Nikhil Chapter 9: GAUT: A High-Level Synthesis Tool for DSP Applications. Philippe Coussy, et al. Chapter 10: User Guided High Level Synthesis. Ivan Auge Chapter 11: Synthesis of DSP Algorithms from Infinite Precision Specifications. Christos-Savvas Bouganis, George Constantinides Chapter 12: High-Level Synthesis of loops using the Polyhedral Model. Steven Derien, et al. Chapter 13: Operation Scheduling: Algorithms and Applications. Gang Wang, Wenrui Gong, Ryan Kastner Chapter 14: Exploiting Bit-Level Design Techniques in Behavioural Synthesis. Maria Molina, Rafael Ruiz-Sautua, Jose M. Mendias, Roman Hermida Chapter 15: High-Level Synthesis Algorithms for Power and Temperature Minimization. Li Shang, Robert P. Dick, Niraj K. Jha

Product Details

  • publication date: 31/05/2008
  • ISBN13: 9781402085871
  • Format: Paperback, Hardback
  • Number Of Pages: 312
  • ID: 9781402085871
  • weight: 620
  • ISBN10: 1402085877

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