Intellectual Property Protection in VLSI Design: Theory and Practice

Intellectual Property Protection in VLSI Design: Theory and Practice

By: Miodrag Potkonjak (author), Gang Qu (author)Hardback

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"Intellectual Property Protection in VLSI Designs: Theory and Practice" provides an overview of the security problems in modern VLSI design with a detailed treatment of our newly developed constraint-based protection paradigm for the protection of VLSI design IPs from FPGA design to standard-cell placement, from high-level synthesis solutions to gate-level netlist place-and-rout, and from advanced CAD tools to physical design algorithms. The problem of VLSI design IP protection is much more challenging than the protection of multimedia contents or software, and our protection paradigm is also conceptually different from the state-of-the-art approaches in those domains."Intellectual Property Protection in VLSI Designs: Theory and Practice" contains the mathematical foundations for the developed IP protection paradigm, detailed pseudo-code and descriptions of its many techniques, numerous examples and experimental validation on well-known benchmarks, and clear explanations and comparisons of the many protection methods.

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Part I Design security - from the point of view of an embedded system designer: intellectual property in reuse-based design; constraint based IP protection - examples; constraint-based IP protection - overview; summary. Part II Watermarking and fingerprinting for digital data: software protection; summary. Part III Constraint-based watermarking for VLSI IP protection: challenges and the general approach; mathematical foundations for the constraint-based watermarking techniques; optimization-intensive watermarking techniques; summary. Part IV Fingerprinting for IP user's right protection: motivation and challenges; fingerprinting objectives; iterative fingerprinting techniques; constraint-based fingerprinting techniques; summary. Part V Copy detection mechanisms for IP authentication: introduction; pattern matching based techniques; forensic engineering techniques; public detectable watermarking techniques; summary.

Product Details

  • publication date: 28/02/2003
  • ISBN13: 9781402073205
  • Format: Hardback
  • Number Of Pages: 210
  • ID: 9781402073205
  • weight: 512
  • ISBN10: 1402073208

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