A unique guide to using both modeling and simulation in digital systems design
Digital systems design requires rigorous modeling and simulation analysis that eliminates design risks and potential harm to users. Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL introduces the application of modeling and synthesis in the effective design of digital systems and explains applicable analytical and computational methods. Through step-by-step explanations and numerous examples, the author equips readers with the tools needed to model, synthesize, and simulate digital principles using Very High Speed Integrated Circuit Hardware Description Language (VHDL) programming.
Extensively classroom-tested to ensure a fluid presentation, this book provides a comprehensive overview of the topic by integrating theoretical principles, discrete mathematical models, computer simulations, and basic methods of analysis. Topical coverage includes:
Digital systems modeling and simulation Integrated logic Boolean algebra and logic Logic function optimization Number systems Combinational logic VHDL design concepts Sequential and synchronous sequential logic
Each chapter begins with learning objectives that outline key concepts that follow, and all discussions conclude with problem sets that allow readers to test their comprehension of the presented material. Throughout the book, VHDL sample codes are used to illustrate circuit design, providing guidance not only on how to learn and master VHDL programming, but also how to model and simulate digital circuits.
Introduction to Digital Systems is an excellent book for courses in modeling and simulation, operations research, engineering, and computer science at the upper-undergraduate and graduate levels. The book also serves as a valuable resource for researchers and practitioners in the fields of operations research, mathematical modeling, simulation, electrical engineering, and computer science.
Mohammed Ferdjallah, PhD, is Research Associate Professor in the Virginia Modeling, Analysis, and Simulation Center at Old Dominion University. A Senior Member of IEEE, he has published numerous journal articles in his areas of research interest, including Internet-based embedded systems, time-varying identification system analysis, wireless and remote biomedical sensor design, and embedded and reconfigurable systems.
Preface. 1 Digital System Modeling and Simulation. 1.1 Objectives. 1.2 Modeling, Synthesis, and Simulation Design. 1.3 History of Digital Systems. 1.4 Standard Logic Devices. 1.5 Custom-Designed Logic Devices. 1.6 Programmable Logic Devices. 1.7 Simple Programmable Logic Devices. 1.8 Complex Programmable Logic Devices. 1.9 Field-Programmable Gate Arrays. 1.10 Future of Digital Systems. Problems. 2 Number Systems. 2.1 Objectives. 2.2 Bases and Number Systems. 2.3 Number Conversions. 2.4 Data Organization. 2.5 Signed and Unsigned Numbers. 2.6 Binary Arithmetic. 2.7 Addition of Signed Numbers. 2.8 Binary-Coded Decimal Representation. 2.9 BCD Addition. Problems. 3 Boolean Algebra and Logic. 3.1 Objectives. 3.2 Boolean Theory. 3.3 Logic Variables and Logic Functions. 3.4 Boolean Axioms and Theorems. 3.5 Basic Logic Gates and Truth Tables. 3.6 Logic Representations and Circuit Design. 3.7 Truth Table. 3.8 Timing Diagram. 3.9 Logic Design Concepts. 3.10 Sum-of-Products Design. 3.11 Product-of-Sums Design. 3.12 Design Examples. 3.13 NAND and NOR Equivalent Circuit Design. 3.14 Standard Logic Integrated Circuits. Problems. 4 VHDL Design Concepts. 4.1 Objectives. 4.2 CAD Tool Based Logic Design. 4.3 Hardware Description Languages. 4.4 VHDL Language. 4.5 VHDL Programming Structure. 4.6 Assignment Statements. 4.7 VHDL Data Types. 4.8 VHDL Operators. 4.9 VHDL Signal and Generate Statements. 4.10 Sequential Statements. 4.11 Loops and Decision-Making Statements. 4.12 Subcircuit Design. 4.13 Packages and Components. Problems. 5 Integrated Logic. 5.1 Objectives. 5.2 Logic Signals. 5.3 Logic Switches. 5.4 NMOS and PMOS Logic Gates. 5.5 CMOS Logic Gates. 5.6 CMOS Logic Networks. 5.7 Practical Aspects of Logic Gates. 5.8 Transmission Gates. Problems. 6 Logic Function Optimization. 6.1 Objectives. 6.2 Logic Function Optimization Process. 6.3 Karnaugh Maps. 6.4 Two-Variable Karnaugh Map. 6.5 Three-Variable Karnaugh Map. 6.6 Four-Variable Karnaugh Map. 6.7 Five-Variable Karnaugh Map. 6.8 XOR and NXOR Karnaugh Maps. 6.9 Incomplete Logic Functions. 6.10 Quine McCluskey Minimization. Problems. 7 Combinational Logic. 7.1 Objectives. 7.2 Combinational Logic Circuits. 7.3 Multiplexers. 7.4 Logic Design with Multiplexers. 7.5 Demultiplexers. 7.6 Decoders. 7.7 Encoders. 7.8 Code Converters. 7.9 Arithmetic Circuits. Problems. 8 Sequential Logic. 8.1 Objectives. 8.2 Sequential Logic Circuits. 8.3 Latches. 8.4 Flip-Flops. 8.5 Registers. 8.6 Counters. Problems. 9 Synchronous Sequential Logic. 9.1 Objectives. 9.2 Synchronous Sequential Circuits. 9.3 Finite-State Machine Design Concepts. 9.4 Finite-State Machine Synthesis. 9.5 State Assignment. 9.6 One-Hot Encoding Method. 9.7 Finite-State Machine Analysis. 9.8 Sequential Serial Adder. 9.9 Sequential Circuit Counters. 9.10 State Optimization. 9.11 Asynchronous Sequential Circuits. Problems. Index.